Forum Discussion
Simulating the Generic Serial Flash Interface with ModelSim and Quartus 19.1
- 4 years ago
I was able to simulate the flash by using the method explained in the linked article.
It is necessary to create a wrapper for the flash simulation model, that your vendor will (hopefully) provide.
In my case, the simulation model was only available in Verilog and the wrapper had to be in Verilog too, because of naming issues (VHDL doesn't allow for signals to end with an "_").My wrapper asmi_sim_model.v looks like this:
`timescale 1ps/1ps module asmi_sim_model( input wire clk, input wire qspi_pins_dclk, input wire qspi_pins_ncs, inout wire [3:0] qspi_pins_data ); // third party flash simulation module <name_of_your_flash_sim_model> device_model( .S(qspi_pins_ncs), .C_(qspi_pins_dclk), .HOLD_DQ3(qspi_pins_data[3]), .DQ0(qspi_pins_data[0]), .DQ1(qspi_pins_data[1]), .Vcc('d1800), .Vpp_W_DQ2(qspi_pins_data[2]) ); endmoduleTo instantiate the wrapper in my platform designer testbench I also had to create the corresponding _hw.tcl.
The GSFI ASMI SPI interface has to be exported and connected to the asmi_sim_model wrapper. ENABLE_SIM_MODEL has to be deactivated.
It was also necessary to link all the files the flash simulation model needs in the asmi_sim_model_hw.tcl.I hope this answer helps whoever struggles with the same problem.
Best Regards,
Florian
Hello,
is this the solution you are referring to?
1.3.2. Example: Simulating the ASMI Block in a Stratix® V Device... (intel.com)
Here it says, that the "ENABLE_SIM_MODEL" parameter has to be disabled. Which way is correct?
Do I need to connect the "asmi_sim_model" component to the GSFI? I guess so, because otherwise all the asmi pins are just open.
Best Regards,
Florian
I was able to simulate the flash by using the method explained in the linked article.
It is necessary to create a wrapper for the flash simulation model, that your vendor will (hopefully) provide.
In my case, the simulation model was only available in Verilog and the wrapper had to be in Verilog too, because of naming issues (VHDL doesn't allow for signals to end with an "_").
My wrapper asmi_sim_model.v looks like this:
`timescale 1ps/1ps module asmi_sim_model( input wire clk, input wire qspi_pins_dclk, input wire qspi_pins_ncs, inout wire [3:0] qspi_pins_data ); // third party flash simulation module <name_of_your_flash_sim_model> device_model( .S(qspi_pins_ncs), .C_(qspi_pins_dclk), .HOLD_DQ3(qspi_pins_data[3]), .DQ0(qspi_pins_data[0]), .DQ1(qspi_pins_data[1]), .Vcc('d1800), .Vpp_W_DQ2(qspi_pins_data[2]) ); endmodule
To instantiate the wrapper in my platform designer testbench I also had to create the corresponding _hw.tcl.
The GSFI ASMI SPI interface has to be exported and connected to the asmi_sim_model wrapper. ENABLE_SIM_MODEL has to be deactivated.
It was also necessary to link all the files the flash simulation model needs in the asmi_sim_model_hw.tcl.
I hope this answer helps whoever struggles with the same problem.
Best Regards,
Florian
- Farabi_Altera4 years ago
Regular Contributor
Hi,
I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.
best regards,
Farabi