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AAlph's avatar
AAlph
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7 years ago

simulate an LVDS soft core IP

Hi everyone I'am trying to simulate the LVDS soft IP on MAX10 FPGA using modelsim-altera it works fine with the receiver but when simuling the transmitter i get those errors Loading fiftyfivenm.fi...
JosephC_Intel's avatar
JosephC_Intel
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7 years ago

Hi,

We acknowledge this issue. Anand as our L1 engineer has replicated this issue and we've posted this in our internal defect database.

Currently, we are in the sighting stage. If there is any progress, I'll let you know.

Thanks,

Joseph

Intel Customer Support

Sales Marketing Group