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DB
New Contributor
6 years agoHi cpchan!
Thanks for your answer. But this was not my question. Sorry.
My Intention is to realize the following:
Generate two synchronous HD-SDI Datastreams in the FPGA and transmit them in a single 3G-SDI Datastrem.
So, I have two times parallel SDI Data in the FPGA and want to connect them to a SDI II IP Core (Transmitter). The core should generate a single 3G-SDI stream.
How to parametrize the SDI II IP Core?
Thanks!