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AlexR's avatar
AlexR
Icon for New Contributor rankNew Contributor
7 years ago

SDI II IP - TX sync Issue

Hi, In the CycloneV GX project, I configured the SDI II core as follows: bidir, 3G SDI only, transceiver and protocol, CMU, dynamic switching off. I found out that the SDI output in my project is...
SengKok_L_Intel's avatar
SengKok_L_Intel
Icon for Regular Contributor rankRegular Contributor
7 years ago

Each Transceiver bank has 6 channels with two CMU PLLs that you can use for the duplex SDI loopback. You are fine to implement two duplex channel in a single or two transceiver banks. FPLL is not supported for SDI II in Cyclone V device. If the TX channels can share the same CMU PLL (no dependency on RX), which mean each transceiver bank can implement maximum 6 SDI TX and 5 SDI RX.

Regards -SK