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TMayd's avatar
TMayd
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Remote Update IP: How does the CRC Error checking work? Specifically, can you erase part of an image and place a new image and have the "factory" image jump to that image?

Hello, I am trying to make use of the remote configuration IP core for the Cyclone V E. I have gotten the image to properly jump to a different configuration image start. My "factory image" is at 0x000000, while my "application image" is at 0x200000. After I erase and write in a new configuration image at 0x200000 I get a CRC error. Does the CRC get calculated off of the entire configuration file, i.e. when I made the original JIC file, where I had the factory image and application image together? Basically, my central question is, is it possible to partially erase only the old application image, place on a new one, and boot from the old factory image? It seems like that is the purpose of the remote configuration IP... but maybe I'm misunderstanding something?

3 Replies

  • ShafiqY_Intel's avatar
    ShafiqY_Intel
    Icon for Frequent Contributor rankFrequent Contributor

    Hi TMayd,

    In order to get more understanding about this issue, may I know which flash device you are using? (eg, EPCQ,EPCQ-A, etc2)

    Thanks

    • TMayd's avatar
      TMayd
      Icon for Occasional Contributor rankOccasional Contributor
      Currently I'm using the EPCS64 on a Terasic DE0-CV then will be using the m25ql10g micron flash device. I have had no issues configuring from either flash thus far. Just a concern about remote update
  • ShafiqY_Intel's avatar
    ShafiqY_Intel
    Icon for Frequent Contributor rankFrequent Contributor

    Hi TMayd,

    Thank you for your reply.

    "Does the CRC get calculated off of the entire configuration file"

    Yes, CRC calculated from the configuration file.

    "is it possible to partially erase only the old application image, place on a new one, and boot from the old factory image?"

    Yes, it is possible to do so. You need to use the register Map to control your RSU design. You may refer to the following RSU reference design. You may see how we control the RSU using the Register Map.

    https://fpgacloud.intel.com/devstore/platform/18.0.0/Standard/remote-system-upgrade-with-system-console-for-cyclone-10-lp/

    Let me know if you have any further queries.

    Thanks.