Remote Update for Cyclone Reset Question and Application Image Question

Hi Brian, Thanks for much clear explanation. 1. “The machine must be reset before first use, otherwise the state is not guaranteed to be valid." This statement refer to FPGA when you power up the device. When you power up your FPGA device, FPGA device did not know which state machine it at this time. Therefore, to guarantee the FPGA working according to your define State Machine, you need to toggle/press the RESET port/pin. Thus, once you toggle the RESET port/pins, FPGA will start the state machine at Reset State and work according to your define State Machine. For your case, “I can apply reset in the factory image on startup and not apply reset in the application image”, why do you apply reset in factory image? You need to understand that the RESET state is applied before configuration mode (before factory image & application image on startup). “do I have to be concerned about applying reset at startup the 2nd time in the factory image?” You only need to apply reset once after you power up the FPGA. If you do not power off the FPGA, you do not need to apply reset (FPGA already knows it current State machine, no need to reset again) 2. If you refer to the RU_RECONFIG_TRIGGER_CONDITIONS (Table 20 on page 33), you can use these condition instead of flag to prevent a reconfig. You also can use flag if you want, and it’s depend on how you design your HDL code. Thanks