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ESama's avatar
ESama
Icon for New Contributor rankNew Contributor
6 years ago

Ref Clock problem in the simple_socket_server exemple based on the Triple Speed Ethernet for Cyclone 10 GX Development kit through Quartus 18.1

Hello I get the following error when I try to compile with quartus 18.1 the simple_socket_server exemple given for the Cyclone 10 GX dev kit : "Error(18694): The reference clock on PLL "sss_qsys_i...
NikoR's avatar
NikoR
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Hi.

The link you provided is broken...

Do you have an updated link that works? I would like to see it...

Thanks

Nikolay

ESama's avatar
ESama
Icon for New Contributor rankNew Contributor
6 years ago
Hello Nikolay Please find below a new link to the zip file. https://we.tl/t-P3EMrZrg3x The original request were: Triple Speed Ethernet : Low data rate with Simple Socket Server exemple I 'm using the simple_socker_server exemple proposed with the Cyclone 10GX dev kit. The FPGA card is connected to a PC through a 1 Gbps Ethernet link. The exemple is working well with out any PB. In order to evaluate the data rate performance, I added in the SSSSimpleSocketServerTask a loop to transmit 10 000 time a buffer of 1 ko with the send() function. The transfer takes 8 s to be completed. By replacing the FPGA dev kit by a socket server implemented in a PC through the same 1 Gbps Ethernet link, the transfer takes roughly 0.2 s. Where does the problem com from ? Thank you for your help Best regards Etienne Samain SigmaWorks Le 18/02/2020 à 14:07, Intel Forums a écrit :