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foft's avatar
foft
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Quartus ram block sharing bug on Cyclone V

I am using a Cyclone V 5CEBA2F23C8 in my design for an Atari XL recreation - the EclaireXL. The Cyclone V has been excellent and I am very impressed with the technology. The fractional PLLs are rea...
foft's avatar
foft
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

To restate the issue more simply to increase changes of a reply.

I have a design that used to work well for the Cyclone V 5CEBA2F23C8. As the FPGA filled up Quartus decided to share the same block ram between parts of the design.

For some reason, a bug in the design, or a bug in Quartus, the sharing of block ram does not work correctly.

Is there a way to disable sharing block ram between multiple parts of the design?

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    5 years ago

    Without seeing the design, it's hard to understand what you mean. Are you saying that you've inferred or instantiated a RAM and the same physical RAM block is being shared using multiple ports? Can you show some code or what you're seeing in the RTL viewer or the Technology Map Viewer?

    There are packing and merging options you could check in Assignments menu -> Settings -> Compiler Settings -> Advanced Analysis & Synthesis Settings, but they're mostly for registers.

    • foft's avatar
      foft
      Icon for Occasional Contributor rankOccasional Contributor
      5 years ago

      I see the same port of an M10K ram block used in two places. In my most recent build this is M10K_X38_Y11_N0 as seen here in the memory use summary - filtered to the duplicate:

      In the technology map viewer I see this in the 6502 cpu:

       ... and the supporting zpu processor rom:

       When this occurs I get the wrong results from the op code decoder in the 6502 cpu.

      The code is online:

      http://www.64kib.com/atarixlfpga_svn/trunk/atari_800xl/common/a8core/cpu_65xx_a.vhd

      http://www.64kib.com/atarixlfpga_svn/trunk/atari_800xl/eclaireXL_ITX/zpu_rom.qip

      In the table in the 6502 code it says:

      "0100" & "100010" & implied   & aluInX   & aluInc, -- E8 INX

      Which is supposed to be:

      0x002020000112 (i.e. 0100 is 2, then 1000, then 10... )

      However because of this ram I end up with

      0x002020100112

      But only when I add some unrelated video logic using other block ram and start getting this block memory shared. So the stack pointer is hanged on opcode E8 (increase X) when it shouldn't be.

      The project is all open so I can share the whole build. Its attached, though needs compiling - load the project atari800core_eclaireXLv1.qpf from the attached.