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NGord's avatar
NGord
Icon for Occasional Contributor rankOccasional Contributor
2 years ago
Solved

Quartus MSGDMA core Empty bits when used from Avalon ST to Memory Mapped transfer

On an Avalon-ST to Memory mapped DMA transfer, if Empty bits are set, on the Avalon ST bus, what happens to a 32 bit Memory mapped transfer, does the DMA just write the relevant bytes to memory?
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  • ShengN_altera's avatar
    ShengN_altera
    2 years ago

    Hi,

    If using the Packet Support Enable feature, Empty bits signal will be available. With this feature enabled, actual bytes (no additional bytes) will be transferred for the transaction. So I would say that DMA will just write the relevant bytes to memory as mentioned before.

    Thanks,

    Sheng

EBERLAZARE_I_Intel's avatar
EBERLAZARE_I_Intel
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hi,


(i), for an Avalon -ST to a Memory mapped transfer, if I have one channel bit enabled, which can be set to a 0 or a 1, how does that manifest itself on the Memory mapped interface? Is it ignored?


For MSGDMA with Streaming to Memory-Mapped mode, the channel enabled option will be grey out means can’t be enabled. So I would say that’s right it’ll be ignored.


NGord's avatar
NGord
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

The above reply is on the wrong thread - please delete.