Occasional ContributorAfter generating my VHDL files in Qsys, I am not able to find the <name>_inst.v that Qsys usually outputs. This have never happened before. If it's relevant, this is my first time I'm working with a multi-system qsys project.
Regular ContributorHi,
Which version & edition of Quartus are you using? Also can you tell about your design?
Have you regenerated qsys system and checked?
Regards
Anand
Super ContributorNot sure why you would be looking for a .v file if you're generating VHDL, but how much and where have you looked in the directory created when you generated the system? It's named after the name of your system.
Occasional ContributorI am using Quartus Prime Standard Edition Version 17.0.2.
My overall Quartus project is a video streaming pipeline and makes use of a Qsys block. My Qsys block contains a top level and two subsystems. The top level contains a CPU, on-chip memory, and hard memory controllers. One subsystem contains the Altera Video and Image Processing IPs and the other subsystem contains NIOS related peripherals.
In the past whenever I had a Qsys block and I generated the VHDL, I would find a file in the qsys project sub folder called <name>_inst.v with the instantiation template. This time however the file does not appear and neither does the <name>_bb.v file (but I'm not sure what that one is used for anyway). I've looked in all the folders inside my Qsys directory.
Fortunately I found a way to view the instantiation template directly in Qsys, though I'd like to know why these files are no longer being generated. For anybody who is curious, there is the option to "show the instantiation template" under the generate menu.
