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XQSHEN's avatar
XQSHEN
Icon for Occasional Contributor rankOccasional Contributor
6 years ago
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problems find when simulate UniPHY + DDR2

IP: UniPHY with DDR2 controller Quartus Prime Standard 18.0 Simulation: Nios 2 + Uniphy + Micron DDR2 (MT47H128M16) Modelsim-intel is used. Problem: it stops during ddr2 initialization phase....
  • IntelSupport's avatar
    IntelSupport
    6 years ago

    Hi Xiaoqiang Shen,

    UniPHY simulation does not adhere to the initialization timing to speed up the simulation so it will fail when using the Micron memory model. I assume the simulation passes with the DDR2 example design with Intel generated memory model. As a workaround, you can comment out the initialization time check in the Micron memory model.

    Hope this helps.

    Thanks,

    Rashmi



IntelSupport's avatar
IntelSupport
Icon for Contributor rankContributor
6 years ago

Hi Xiaoqiang Shen,

UniPHY simulation does not adhere to the initialization timing to speed up the simulation so it will fail when using the Micron memory model. I assume the simulation passes with the DDR2 example design with Intel generated memory model. As a workaround, you can comment out the initialization time check in the Micron memory model.

Hope this helps.

Thanks,

Rashmi



XQSHEN's avatar
XQSHEN
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

1) Actually it’s defined the tINIT = 200us when launch this UniPHY IP. The parameter is also compliant with Micron datasheet. Why UniPHY IP doesn’t consider it as it knows exact memory parameter.

2) If you look at my first question attachments, you will see UniPHY IP doesn't follow memory initialization sequence. For example: cke should stay 200us when power up.