Forum Discussion
Pramod_p
New Contributor
4 years agoProblem in download bitstream on Stratix 10 MX board
Hi,
I am trying to work with the following design example.
https://fpgacloud.intel.com/devstore/platform/18.1.0/Pro/pci-express-gen3-x16-avmm-dma-with-hbm2-memory-reference-design/
I am ab...
JohnT_Altera
Regular Contributor
4 years agoHi,
May I know what issue are facing? Is it incorrect data read back? Have you try to SignalTap the internal data?
- Pramod_atintel4 years ago
New Contributor
Hi John,
I am not getting any response back from HBM memory. Yes, I have connected SignalTap to the AXI ports of the HBM controller.
For burst count greater than 1, there is no transfer of data.