Altera_ForumHonored Contributor14 years agoProblem in DDR2 controller with SOPC simulation. Hey guys, i am trying to simulate the ddr2 sopc controller using the method provided, by making a wrapper file using the example top level design. The design passes the analysis and synthesis test...Show More
Recent DiscussionsCan't generate F-Tile Ethernet Hard IP Design ExampleMAX10 TSE reference designAccessing registers in the PCIE IP beyond MCDMA using system consoleConstraints not being picked for DCFIFOCyclone IV GX project failed migration from 20.1 to 23.1std