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Arintel
New Contributor
5 years agoPCIe-MM-DMA: Read/Write DMA & BAR0/2 mutually exclusive?
Hi All,
I'm using the Intel PCIe-MM-DMA IP core. In my design, I would often need to schedule a Write-DMA to transfer data from the FPGA to the host system memory. However, sometimes, when there's ...
BoonT_Intel
Frequent Contributor
5 years agoWe do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.