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Arintel
New Contributor
New ContributorPCIe-MM-DMA: Read/Write DMA & BAR0/2 mutually exclusive?
Hi All,
I'm using the Intel PCIe-MM-DMA IP core. In my design, I would often need to schedule a Write-DMA to transfer data from the FPGA to the host system memory. However, sometimes, when there's ...
BoonT_Intel
Frequent Contributor
Frequent ContributorHi Ari,
To get the read/write DMA simultaneously, I think we need to modify the software at the RP by allocating RP memory for read/write DMA.
As you can see, it is stated in the UG - Software Program for Simultaneous Read and Write DMA section.
