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Altera_Forum
Honored Contributor
Honored Contributorpcie hardip Lane Reversal
hi, i use the civgx30 on my board to utilize the pciex4 hardip. but unfortunately,i connect (slot lane0) to (fpga lane3),and (slot lane1) to (fpga lane2),and (slot lane2) to (fpga lane1), and (slo...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Simply The Ip will functionally then perform Lane Reversal Automatically for you. This is a built in required feature of PCIe. --- Quote End --- What do You mean - pin-out the FPGA correctly (0 to 0, 1 to 1, 2 to 2, 3 to 3)? According to the attached picture 0 to 0, 1 to 1, 2 to 2, 3 to 3 can be both for Plane reversal and No plane reversal. How exactly is to make plane reversal for Cyclone IV GX with PCIe x 4 Hard IP? Apparently that has to be done in *.qsf file, in Pin Planner or where?
