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Altera_Forum
Honored Contributor
Honored Contributorpcie hardip Lane Reversal
hi, i use the civgx30 on my board to utilize the pciex4 hardip. but unfortunately,i connect (slot lane0) to (fpga lane3),and (slot lane1) to (fpga lane2),and (slot lane2) to (fpga lane1), and (slo...
Altera_ForumHonored Contributor
Honored ContributorI just came across your post because I was reviewing documents about the lane reversal feature of the PCIe hard IP core for Cyclone V. According to the PCIe user guide, Cyclone IV hard IP also does support lane reversal.
But does it actually work, and is it automatical or must it be configured? Unlike Arria V, that has a pin assignment perfectly ordered for a PCIe card, Cyclone V needs lane reversal if you don't want to cross all Rx and Tx pairs in a 4 lane design.
