Forum Discussion
FFULC
New Contributor
5 years agoPCIe Hard IP core in Cyclone V GX
I am using a Cyclone 5CGXFC5C7F23C8N in a new design and planning to implement a PCIe x4 endpoint with CvP enabled.
The CVP user guide, UG-01101, states that I need to use the bottom left hard IP w...
JohnT_Altera
Regular Contributor
5 years agoHi,
Yes, if the footprint is the same then you can change the flash anytime. You will just need to confirm that the bitstream is able to fit into the flash.
FFULC
New Contributor
5 years agoThanks John
If I am programming the EPCQA via the Cyclone's JTAG interface can I still put a CPLD in the same chain?
Also, I was using a MAXII EPM1270T144I5N on my previous project that now seems to be going EOL.
What CPLD would you now recommend that will be supportable over the next few years?
Regards
Frank