Forum Discussion

New Contributor

6 years ago

PCIE GEN 2 Speed grade in A10 FPGA

Hello, My targeted A10 device is 10ax057h4f34e3vg. However I found from the A10 PCIE user guide, the recommended speed grade for all PCIE GEN is 1 and 2 only. What is the reason speed grade is not r...

SengKok_L_Intel

Regular Contributor

6 years ago

Hi,

The core speed rate of this A10 device is -3.

As per table 7 in the link below, the Gen 3 is supported in x2 with 128 bits interface and x4 with 256bits interface. Other settings may have timing concerns so that it is not recommended.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_a10_pcie_avst.pdf

Regards -SK

Forum Discussion

PCIE GEN 2 Speed grade in A10 FPGA

Recent Discussions

Cyclone-V SCFIFO with M10K/MLAB memory - adding ECC

Agilex3/5 GTS Hard Ethernet IP 10G example design pin loc and io std wanted

Agilex 7 slew rate reconfiguration

Agilex-7 AXI MCDMA for PCIe hang

Constraints not being picked for DCFIFO