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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

PCIe core LTSSM signals

Hi guys,

I've observed some "weird" issue today.

I'm pulling Test_out[4:0] out to my Logic so that I can read them as system status.

When I do that I have intermittent link training issue. Disconnect the lines will make the problem go away.

- Connect those LTSSM bits to my logic: intermittent, failed to nego every 5-6 times

- Disconnect those LTSMM from my logic OR Register them first before feeding into my logic: issue goes away.

Those LTSSM comes directly from HIP, any chance that lots of fanout/delay would cause internal statemachine malfunction?

I repeatedly connect and disconnect the LTSSM from my logic several times and always be able to reproduced.

Baffled by this thing !!!

Thanks a bunch

Jeff

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  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Hey,

    It seems like your is working. When the statemachine is able to run to that KICK_DELAY_OC state.

    In my case, when it's stuck, it's stuck right after the IDLE state and can't recover. Look at the "PowerOnStuck.jpg". The state is stuck at 00001 which is not a valid state.

    Jeff