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SnehalB's avatar
SnehalB
Icon for New Contributor rankNew Contributor
4 years ago

OTA configuration process on Cyclone V FPGA via QSPI flash

Hi , i want to know about OTA configuration process on Cyclone V FPGA we are using Cyclone V E series FPGA and want to interface QSPI flash for FPGA configuration and also may be for some dat...
YuanLi_S_Intel's avatar
YuanLi_S_Intel
Icon for Regular Contributor rankRegular Contributor
4 years ago

Please find my response below:

1] for using this IP do we need to connected external flash memory to dedicated AS configuration IO on Cyclone V FPGA for QSPI flash

Yes, you need to connect QSPI flash with it.

2] what is max frequency at which we can run this IP and configuration?

20MHz for Cyclone V.

3) Error (169310): Design has remote update block "axi_control_block:axi_control_block_i|spi_recievers:spi_recievers_i|spi_recievers_remote_update_0:remote_update_0|altera_remote_update_core:remote_update_core|sd1", but the selected configuration scheme "Passive Serial" does not support remote update

It seems like you have selected "Passive Serial" in the setting? Can you change it to “Active Serial”?

“tools -> Device and Pin Options -> Configuration -> Configuration Scheme”