[MT25QL512] HAL drivers in quartus prime 2020.1

Dear EBERLAZARE,

Thank you for your reply but I think I found the solution or I rather understood how the GSFI works.

In fact, when one wants to erase or lock sectors in FLASH, you have to insert CSR commands with the TRUE address range of the MT25 and this is pretty normal.

However, when one wants to read/write data using AVMM interface inside MT25, it is necessary to divide addresses by 4 (shift right 2).

The way Qsys displays the AVMM address range is a bit misleading to be honest because it shows the MT25 address range which is

0x00000000 -> 0x03FFFFFF.

For example, if you read address 0x02000000, you have a copy of what is written at 0x00000000. That's why I thought there was a problem.

To answer your question "Have you previously use other HAL drivers before?", there is no HAL drivers for the GSFI in quartus prime 20.1. Instead, Intel provides a very low level example to use the GSFI with IORD & IOWR. In this example, it only shows how to r/w at address 0x00000000.

Thank you EBERLAZARE