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Nagaraju's avatar
Nagaraju
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5 years ago

MSI-X Design Example for Cyclone V

I have downloaded an MSIx example design from the link -"https://www.intel.com/content/dam/altera-www/global/en_US/uploads/c/cc/Msix_avmm_ref_design.zip". There is top level file "pcie_irq.v" which...
SyafieqS's avatar
SyafieqS
Icon for Super Contributor rankSuper Contributor
5 years ago

Hi Nagaraju,

Generally all the interface in pcie_irq module ,it is for communication of pcie protocol and avalon memory map to all logics inside FPGA.

Thanks,

Regards