New Contributor
ContributorIt is pretty straightforward for SignalTap usage. Go through this training https://www.youtube.com/watch?v=DCUhsezqydQ would help. Which interface do you need to change its bits per symbol? source streaming from counter? Refer to avalon-mm spec https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/manual/mnl_avalon_spec.pdf, Table 18,pg43, you are able to change its streaming properties using "dataBitsPerSymbol"
Occasional ContributorHi,
I am trying to implement triple speed ethernet in Cyclone 10 FPGA. I have integrated triple speed ethernet core in platform designer in qsys. If i pump data and do loop back in system side of MAC, its working fine. I am able to monitor Start of packet, data valid, data, End of packet properly in signal tap. Now my aim is that i try to capture the streaming data in system side of MAC directly in Nios side memory. For this i am using Modular Scatter gather DMA. For receive data i am using one MSGDMA in streaming to memory mode and one for transmit data i am using one MSGDMA in memory to streaming mode. I try to capture data in descriptor memory in onchip ram. But i am not getting any data.
I have doubt about my connections of MSGDMA in Qsys.There are no any specific examples detailing how to use MSGDMA with TSE. Some people have done it with SGDMA . I am using quartus 18.1. So how to go about it. How to capture data in onchip RAM.
Kindly guide
Av
