Forum Discussion
Robert_H_Intel
New Contributor
New ContributorModule dependency loop warning???
Just for background, I have a subsystem (let's call it subsys.qsys) which contains my HPS block and some peripherals, one of them being a clock_bridge component. This bridge brings the mm_bridge_0_...
GuaBin_N_Intel
Contributor
ContributorNot really sure if this relates to the warning you see https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base/solutions/rd11172011_691.html
