MAX10 FPGA INTERNAL ADC

I am working on the DC-DC power converter application. I utilize the internal ADCs of the MAX10 FPGA for sensing the current and voltages that required for the closed loop control of the power converter.

Can I please know the best way to invoke the Internal ADC in the software?

1. Using Nios II with Avalon MM interface for transmitting the data to the error generator block ( VHDL Soft IP core).

or

2. Accessing the ADC Vale by making a soft IP ADC core to send data to the error generator block ( VHDL Soft IP core).

Also suggest me resources for the implementation of the same.