Forum Discussion
Occasional ContributorMAX 10 flash controller wrapping mode - non-functional
Hi,
From the SIgnalTap, I observed that you only provide read signal for 1 clock cycle when you are using burst count of 2. I would recommend you to provide read signal at least 2 clock cycle when you are using burstcount of 2 in wrapping mode.
Please refer to Figure 18 in https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_ufm.pdf
Regular ContributorHi,
From the SIgnalTap, I observed that you only provide read signal for 1 clock cycle when you are using burst count of 2. I would recommend you to provide read signal at least 2 clock cycle when you are using burstcount of 2 in wrapping mode.
Please refer to Figure 18 in https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_ufm.pdf
foftFantastic that works.
Regarding that patch I applied to the ip, is that still needed? Perhaps that was related to not holding the read long enough as well. Since the avalon mm says it snaps the address on the first cycle I had assumed it also snapped read too.
incremental:
wrapping:
