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TKapi
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6 years ago

MAX 10 Erasing via On-Chip Flash Intel FPGA IP - SOLVED

Dear friends, I'm using MAX10 (10M08DAF484C8GES), Quartus 18.1 and On-Chip Flash Intel FPGA IP. My problem is: When I need erase Sector ID1 or ID2 (or another), the "busy" from Core status Regist...
TKapi's avatar
TKapi
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6 years ago

Dear,

thank you for your answer. Figure 11 and 12 is Read Operation. It working good [when I use "non-default initialization file" on "On-Chip Flash IntelFPGA IP", the data stored via USB Blaster I read via "On-Chip Flash IntelFPGA IP (figure 11 and 12 on your answer)" good].

I can't erasing. I can't find any erasing figure or example, only 4.2.4. and 4.2.5. on your document.

When i disable the write protection, then test BUSY state (=IDLE). Then I write erase operation in the status register. Then test BUSY state. BUSY state is BUSY_ERASE now, but only one clock period. Next clock period is BUSY reading IDLE again. Flash is no erased and es (erase successful) is 1'b0 always.

I don't know what I doing wrong..

Thank you, Tomas