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PVanL's avatar
PVanL
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Low latency Ethernet 10R Reference Design. How to modify the behaviour of the testbench?

I understand the "avalon_if_param_pkg" is used to configure the behaviour of the Avalon Interfaces. Eth_register_map_params_pkg to configure the inside of the packet. I want to change the gaps betwee...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi Pieter,

I have not hear back from you for sometime.

Hopefully everything goes well at your side.

I am now setting this case to closure.

Thanks.

Regards,

dlim

PVanL's avatar
PVanL
Icon for Occasional Contributor rankOccasional Contributor
5 years ago
Hi Deshill, Thanks for asking. I am still working on this, and find every now and them some irrularities, that I normally can solve. Can you help me with the next step: I want to couple the low latency INTEL MAC in the 10GBASE-R Example to the INTEL PCIExpress. The only PCI Express example that I found, is one that communicates to a memory. Do you also have an example that has the PCI Express coupled to the Low Latency MAC? Thanks in advance, Regards, Pieter van Leeuwen