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PVanL's avatar
PVanL
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Low latency Ethernet 10R Reference Design. How to modify the behaviour of the testbench?

I understand the "avalon_if_param_pkg" is used to configure the behaviour of the Avalon Interfaces. Eth_register_map_params_pkg to configure the inside of the packet. I want to change the gaps betwee...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

HI,

Can you be more specific on which example design that you are referring to here ?

  • Do you have the link to the example design ?
  • Or if this is example design generated from certain Intel FPGA IP, then pls share with us which IP and using what setting ?

Thanks.

Regards,

dlim