Jesd204b interface seems to misbehave after upgrading quartus from 16 to 19

Hi,

As I understand it, you observe some sync issue with the JESD204B in Q19.2. There seems to be no issue when you are using Q16.0. To ensure we are on the same page, just would like to check with you on the following:

1. What is the specific device that you are using with the IP?

2. Would you mind to further elaborate on the sync toggling issue? Probably some screenshots with explanation will be helpful to further understand the observation.

3. Just would like to check with you if you have had a chance to try with Modelsim simulation simulation to see if similar issue occur? This is helpful to isolate out functional issue in 19.2.

4. Mind share with me the .qsys or .ip file of your JESD IP so that I can have better understanding on your configuration.

5. I understand that you have regenerated the IP. Just wonder if you have had a chance to review the SDC to see if there is any update required as mentioned in the IP user guide -> "Timing Constraints For Input Clocks".

6. Would you mind to signaltap on the signals as mentioned in the IP user guide -> "PHY Status Signals for All Supported Devices Except Intel Stratix 10 E-tile Devices" to see if there is any anomaly.

Please let me know if there is any concern. Thank you.

Best regards,

Chee Pin