Forum Discussion
RamaMohan
Occasional Contributor
7 years agoIssue with PCIe HIP(A10) Gen3 model behavior in simulations with serial interface
Hi, We are facing an issue in simualtions, with the data transmitted from PCIe hard-IP model during initialization while switching from Gen1 to Gen3 Speed. The model being used is the one for A10 F...
Nathan_R_Intel
Contributor
7 years agoHie RamaMohan,
I believe my last update did not get through.
I tried with VCS and still unable to reproduce the issue. Hence, without your RP BFM, I am unable to replicate the failure and de bug further.
Regards,
Nathan