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RamaMohan's avatar
RamaMohan
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

Issue with PCIe HIP(A10) Gen3 model behavior in simulations with serial interface

Hi, We are facing an issue in simualtions, with the data transmitted from PCIe hard-IP model during initialization while switching from Gen1 to Gen3 Speed. The model being used is the one for A10 F...
Nathan_R_Intel's avatar
Nathan_R_Intel
Icon for Contributor rankContributor
7 years ago

Hie RamaMohan,

Yes it is not difficult to ​generate the End Point library files from .ip files; but wanted to check the exact library files. Even similar Quartus versions with patch or updates could have different library files.

Anyway, I will need to update my available BFM to be Gen3 capable and attempt to replicate this issue on myside.

I will be out from 7th to 13th December. Hence, please expect my next response only after 14th December 2018.

I will need the following information from you.

i. Have you installed any patch or update to Quartus Prime 17.1

ii. Which tool are you using for simulation

Regards,

Nathan