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RamaMohan's avatar
RamaMohan
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7 years ago

Issue with PCIe HIP(A10) Gen3 model behavior in simulations with serial interface

Hi, We are facing an issue in simualtions, with the data transmitted from PCIe hard-IP model during initialization while switching from Gen1 to Gen3 Speed. The model being used is the one for A10 F...
RamaMohan's avatar
RamaMohan
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

Hi Nathan,

We have both the configurations with SRIOV enabled and without SRIOV enabled as we need 2 endpoints. I've attached the IP config files of the both the EPs.

We are seeing the same issue for both the endpoints. We are using the sriov sim files except for all the unique modules specific to non-sriov config.

But, I'm wondering how SRIOV would impact the LTSSM behavior in your BFM.

Thanks,

RamaMohan