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Matt1's avatar
Matt1
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

issue in routing HPS I2C to FPGA in A10 SoC

Hi, I have a requirement to route the I2C(master) in HPS to FPGA and connect the I2C signals to an I2C slave IP(IO Expander logic).I tried to in the following way under parameter(hard processing...
Eliath_G_Intel's avatar
Eliath_G_Intel
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Hi Nithin,

First of all, thank you for reaching us.

Regarding your issue... yes it is possible to configure the I2C in HPS as master and route it to FPGA, to do this please take a look into the next documentation, page #11, you will find a couple of lines for instantiation, you will need to copy them and add them to your *.v file

Regards,

-Eliath

  • Matt1's avatar
    Matt1
    Icon for Occasional Contributor rankOccasional Contributor
    5 years ago

    hello,

    Thankyou Eliath for your reply

    i understand the ALT_IOBUF Primitive instantiation.

    In the attachment, I have highlighted the pins of I2C which will be visible to FPGA and that looks like slave .

    for example: what I understand is SCL is an Input port which means the clock will come in from the master, so it is a slave.

    please correct me if i am wrong.

    Regards

    Matt