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SSmit7's avatar
SSmit7
Icon for New Contributor rankNew Contributor
6 years ago

Is the channel indicator byte (0x7C) in the SPI IP Core guaranteed?

I have implemented the SPI to Avalon-MM IP core in my MAX10 design. While running stress tests on the data transfer between a processor and the MAX10, there is a very rare situation where the channel...
Rahul_S_Intel1's avatar
Rahul_S_Intel1
Icon for Frequent Contributor rankFrequent Contributor
6 years ago

Hi Smit,

Just had conversation with internal guys and I check from our data base , as of now what ever u say like that kind of issue is not been reported and SPI protocol which is been used by altera is standard industrial protocol , not added any additional bits