IP Core Resource Center for TSE, SDI, SPI4.2, PCIE, SRIO and 10GbE

thanks for your sharing

Will

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With this design, I can (theoretically, at least!):

- test a single board of mine (using internal loopback)

- test 2 boards of mine (one sends and receives, the other one loops back)

Yet, I'd like to make a 3rd test. I would like to "ping" one of my board from a PC with minimum modification.

My question is: do I really need to implement an OS, a Niche style TCP/IP stack? Is it naive to believe I can simply loopback the frames received from the PC into the transmitter with minimum byte analyze and overrides (no software)? Is there a design reference or a tutorial applicable here?

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hi Jankzov,

You should have completed your project. I am trying the third test you did before. If you can share with me some experience. How did you connect the two boards with 10GbE design? In the document, for testing in hardware, they do not have generator/checker, so did you have to use the 'remote partner' that can generate, transmit, receive and check the data?

Thanks a lot.

update the new link for SDI IP and TSE IP:

TSE:

https://www.altera.com/support/support-resources/intellectual-property/interface-protocols/triple-speed-ethernet/ips-inp-tse.html

SDI:

https://www.altera.com/support/support-resources/intellectual-property/interface-protocols/sdi/ips-inp-sdi.html

update for the new link for 10GE:

https://www.altera.com/support/support-resources/intellectual-property/interface-protocols/_10-gbps-ethernet/ips-inp-10gbe.html