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roeekalinsky's avatar
roeekalinsky
Icon for Contributor rankContributor
4 years ago

IOPLL simulation model pitfall: delta cycle delays vary between clock outputs

The following pertains to the IOPLL simulation models for the Arria 10, Cyclone 10 GX, and Stratix 10, at a minimum (and possibly others I've not yet tested). I've noticed that the number of delta ...
Ash_R_Intel's avatar
Ash_R_Intel
Icon for Regular Contributor rankRegular Contributor
4 years ago

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