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ymiler's avatar
ymiler
Icon for Contributor rankContributor
5 years ago

IO standard

Hi I have differential (P/N) wires in the top of the FPGA (input & output) My question is : How can I know which IO standard I should to define I found out a lot of options to define : D...
AminT_Intel's avatar
AminT_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hello,

These are the two documents that are mainly being used in designs:

1. GPIO User Guide: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/stratix-10/ug-s10-gpio.pdf

2. Device Datasheet: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/stratix-10/s10_datasheet.pdf

These documents do not explain in details when you have to use the information is enough to know what it does based on the specs given.

Thank you.

  • AminT_Intel's avatar
    AminT_Intel
    Icon for Regular Contributor rankRegular Contributor
    5 years ago

    We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.