Altera_ForumHonored Contributor10 years agoInterrupt Initialization Nios II/e --> Nios II/f Hi out there! So i got a Nios2/f License today and ported it into my existing Design. But when i flash the NiosII Program onto the FPGA the Processor frezzes. I commented the Interrupt init...Show More
Altera_ForumHonored Contributor10 years agoCheck if the IRQ hardware connections are still there in Qsys
Recent DiscussionsCyclone-V SCFIFO with M10K/MLAB memory - adding ECCAgilex3/5 GTS Hard Ethernet IP 10G example design pin loc and io std wantedAgilex 7 slew rate reconfigurationSolvedAgilex-7 AXI MCDMA for PCIe hangConstraints not being picked for DCFIFO