Intel FPGA on board USB Blaster example design

Intel FPGA boards often have the USB Blaster logic on the development board itself. In this way a separate programmer is not required. We have this situation where more than five USB Byte Blaster II programmers became damaged during systems testing. It is thought that if we have the byte blaster logic on the prototype board itself, it will save a lot of resource on the long term by simplifying many other tasks and mitigating some of the risks that exist with the Byte Blaster IIs being used at present.

Usually a small Max series device is seen to implement the configuration logic. Does Intel/Altera provide detailed instructions on how to go about creating the on-board Byte Blaster II using a Max device as found on their development boards?