Forum Discussion
INtel Design Store "A10SOC Scalable Multispeed 10M-10G Ethernet Design" fails to test in system console ?
- 6 years ago
after following the design user guide ( https://www.intel.com/content/dam/altera-www/global/en_US/uploads/3/38/Arria_10_SOC_Scalable_Multispeed_10M-10G_Ethernet_Design_user_guide.pdf ),
to set " U50 CLK0A/B = 100MHz for "mm_clk" input ", the System Console can work as expect, I can run test using this example design on A10SOC KIT Board,
Thanks all for helps.
Hi @DeshiL_Intel , may I ask an additional question ?
I see in ./hwtesting/system_console/main.tcl script, there's below command :
proc CONFIG_SFP_A_B_RATESEL {} {
puts " CONFIGURE SFP A "
reg_write 0x300000 0x4 0x1460
puts " CONFIGURE SFP B "
reg_write 0x300000 0x4 0x1660
}
what's the meaning of the Register_operation : reg_write 0x300000 0x4 0x1460 && reg_write 0x300000 0x4 0x1660 ?
Where can I find document to describe these Registers Functions in this design ? ? Do you know this ?
Thanks
/jet