Forum Discussion
JET60200
Contributor
ContributorINtel Design Store "A10SOC Scalable Multispeed 10M-10G Ethernet Design" fails to test in system console ?
Hello, I have an A10SOC Kit Board. IN intel design store, I found a Multiple - Rate 10GE design example on A10SOC Kit Brd as below link : https://fpgacloud.intel.com/devstore/platform/16.0.0...
after following the design user guide ( https://www.intel.com/content/dam/altera-www/global/en_US/uploads/3/38/Arria_10_SOC_Scalable_Multispeed_10M-10G_Ethernet_Design_user_guide.pdf ),
to set " U50 CLK0A/B = 100MHz for "mm_clk" input ", the System Console can work as expect, I can run test using this example design on A10SOC KIT Board,
Thanks all for helps.
Deshi_Intel
Regular Contributor
Regular ContributorHi Jet,
Let's wait for Intel IT to fix the doc link so that we can checkout the user guide doc to find out is there any special guideline that we need to watch out in using this ref design.
The system console prompt timeout error which typically caused by either JTAG connection issue or Avalon MM bus stuck issue.
- For the time being, you can also try to reduce JTAG frequency to 16MHz or even 6MHz to see if it helps.
- Also pls ensure you are using the same Quartus version as the shown in ref design to avoid IP upgrade compatibility issue
- Pls check to ensure your Ethernet design is not stuck in reset
- Lastly, pls double check to ensure there is only one system console window open and you are not running other application like BTS or clock GUI or NIOS II terminal command sheel and etc to avoid JTAG congestion issue
Thanks
Regards,
dlim
