Forum Discussion
XCui0
New Contributor
7 years agoInitialization file when infer a RAM IP
Hi, I am using VHDL code to infer a RAM IP of stratix 10. There are two choices to initialize RAM: use a function as provided by the VHDL template, or use attribute as shown in following: type mem_...
CheepinC_altera
Regular Contributor
7 years agoHi Xin,
Thanks for your update. I would set this case to close-pending at this moment. Please let me know if there is any concern. Thank you.