I use the FPGA of cyclone V which type is 5CGXFC3B7F23C8N ,which has 1 GXB Bank （3 transceiver channel）,CH0/CH1/CH2，but CH1 has error

Hi: I re-downloaded quartus ii 17.0, and then opened the project in the attachment. This project was downloaded from the official website of the interFPGA, Without any modification, after upgrading to version 17.0, the chip type was changed to 5CGXFC3B7F23C8, and the VCCH_GXBL_USER_VOLTAGE/VCCH_GXBR_USER_VOLTAGE in the "gx_link_test_example.qsf" file was modified to 2.5V , set hssi_rx/hssi_rx(n) in pin planner is PIN_W2/PIN_W1, set hssi_tx/hssi_tx(n) is PIN_U2/PIN_U1, which is GXB BANK L1. Modify the custom PHY xcvr_custom_phy_0 parameter in gx_link_test_system QSYS, transceiver interface width :10, PCS-PMA interface width:10, Word aligner pattern length :10,word alignment pattern:1111100111. Based on the above changes, compile the project, the same error occurs. As belows: [X] Can you help me to see how my operation differs from your operation? Thank you Best wishes.