I am using Cyclone V Hard IP for PCIe (altera_pcie_cv_hip_ast, Quartus version 17.0) in my design; How do I get WAKE# signal?

Hi, Yes, the wake# signal is not available. The Cyclone V hard IP for PCie is not support the low power state like L0s and L1, and the WAKE# signal is useful in L2 state. You can refer to table 4-6 in the following link: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/archives/ug-01110-1.2.pdf Regards -SK