Forum Discussion

New Contributor

6 years ago

I am trying to incorporate in Quartus II project a IP In-System Sources and Probes with a port size (source / probe) of 512 bits [511..0], but when compiling the following error occurs:

Error (10652): VHDL Assertion Statement at altsource_probe_body.vhd(451): assertion is false - report "SOURCE_WIDTH must be less than and equal to 511 and greater than and equal to 0" (FAILURE or ERR...

VCarr5

New Contributor

6 years ago

In Intel® Quartus® Prime StandardEdition Handbook Volume 3 (https://people.ece.cornell.edu/land/courses/ece5760/DE1_SOC/Power_Estimation/qts-qps-5v3.pdf), page 53 say:

"...Especify the desired parameters for your custom IP variation.

You can specify up toup to 512 bits for each source. Your design may include up to 128 instances of thisIP core..."

RichardT_altera

Super Contributor

6 years ago

May I know which Quartus version are you using?

Forum Discussion

I am trying to incorporate in Quartus II project a IP In-System Sources and Probes with a port size (source / probe) of 512 bits [511..0], but when compiling the following error occurs:

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