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URN
New Contributor
New ContributorHow to write/read to DDR slave from custom IP having Avalon MM interface.
hi, My custom master component is connected to DDR slave in Platform designer(Qsys). I want to write data on to ddr from the custom master component, for this I should write the Verilog code to acce...
GuaBin_N_Intel
Contributor
ContributorFor Avalon-mm master spec, you can refer to this user guide https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/manual/mnl_avalon_spec.pdf, Figure 7 to understand read and write transfer timing. In your case, response signal is an option and not required.
URNHi,
Figure 7 to understand read and write transfer timing. In your case, response signal is an option and not required.
Yes, this will help me.
Thanks for the suggestion.
