Forum Discussion
fArum
New Contributor
New Contributorhow to solve this below mentioned error?
I am simulating PCIE IP (Arria V) in questa sim . I have compiled the altera libraries along with design and testbench files but while simulating I am getting this error recompile work.tb_top because...
BoonT_Intel
Frequent Contributor
Frequent ContributorHello, what error that you facing? seem like you are not include the error message.
Anyway, I will suggest you to try the example design simulation and compare it with your compilation. to run the example design simulation, generate the example design and run it with steps explain in this document: https://www.intel.cn/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-01105-1_6.pdf#page=27
fArumherewith I have attached the error message, which I am facing on
simulation.
