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EPino's avatar
EPino
Icon for New Contributor rankNew Contributor
5 years ago
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How to map TX Avalon-MM slave interface into PC virtual memory?

Hi, I'd like to map TXS port to virtual memory but I am having a hard time understandig how to do that. For example, in order to map BAR0 to virtual memory all I have to do is access the configurat...
  • SengKok_L_Intel's avatar
    SengKok_L_Intel
    5 years ago

    Hi Eduardo,

    No, the TXS port should connect to your application interface NOT BAR.

    If the read/write request is initiated from your application via TXS port to the host, and then the host will be responding to those requests accordingly.

    The size of the host system memory can be 32 bits (2 ^32) or maybe 64 bits (2^64), you will need to confirm it from your host system.

    It depends on which locations of the system memory that you would like to read/write from FPGA. In the IP GUI, there is an address translator table for you to fill in, and this is up to the user to decide where the system memory that their design need to access.

    Regards -SK

SengKok_L_Intel's avatar
SengKok_L_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

You have to map it to the host memory, and it depends where did you wanted to read/write from the system memory. This interface can access up to 4Gb of size.

Regards -SK

  • EPino's avatar
    EPino
    Icon for New Contributor rankNew Contributor
    5 years ago

    Ok, but that is the point of the original question. To map TXS to host memory i'll need a physicial memory address (that points to TXS base address), so that I can assign a virtual memory address to it, correct?

    How can the host get that physical memory address? From the configuration space? Should I connect TXS to a BAR in Qsys?

    Kind Regards,

    Eduardo